The present invention relates generally to a MOS differential amplifier circuit, and more particularly to a voltage subtractor/adder circuit formed on a semiconductor integrated circuit device and a MOS differential amplifier circuit which realizes such voltage subtractor/adder circuit and which has linear transconductance.
FIG. 17 shows a conventional voltage subtractor/adder circuit described in a publication (IEEE Journal of Solid-State Circuits, Vol. CAS-32, No. 11, pp.1097-1104, Nov. 1985). The circuit of FIG. 17 comprises two sets of MOS differential pairs. One of the MOS differential pairs comprises MOS transistors M1 and M2, and the other of the MOS differential pairs comprises MOS transistors M3 and M4. Each of the MOS differential pairs is driven by a tail current Iss.
In the voltage subtractor/adder circuit shown in FIG. 17, voltages V1 and V2 are applied to the gates of the transistors M1 and M, respectively, of the two sets of MOS differential pairs. Both the transistors M2 and M3 are diode-coupled and are driven by a common constant current source (Iss).
Here, with respect to the two sets of MOS differential pairs, tail current values of respective MOS differential pairs and a current value of a constant current source which drives the diode-coupled transistors M2 and M3 are all the same. Therefore, the following formulas are obtained.
ID1+ID2=Issxe2x80x83xe2x80x83(1) 
ID3+ID4=Issxe2x80x83xe2x80x83(2) 
ID2+ID3=Issxe2x80x83xe2x80x83(3) 
where, ID1,ID2,ID3 and ID4 designates drain currents of the transistors M1, M2, M3 and M4 respectively. Therefore, the following relations are also obtained.
ID1=ID3xe2x80x83xe2x80x83(4) 
ID2=ID4xe2x80x83xe2x80x83(5) 
That is, since the currents flowing through the transistors M1 and M2 are equal to the currents flowing through the transistors M3 and M4, respectively, the differential input voltages of the two sets of MOS differential pairs become equal to each other. Therefore, assuming that a common gate potential of the diode-coupled transistors M2 and M3 is V0, the following relation exists.
V1xe2x88x92V0=V0xe2x88x92V2xe2x80x83xe2x80x83(6) 
That is, the following formula is obtained.                               V          0                =                                            V              1                        +                          V              2                                2                                    (        7        )            
From this formula, it can be seen that the circuit shown in FIG. 17 functions as a voltage adder circuit. In this case, the differential input voltage of each of the MOS differential pairs becomes as follows:                                           V            1                    -                      V            0                          =                                            V              0                        -                          V              2                                =                                                    V                1                            -                              V                2                                      2                                              (        8        )            
Next, drain currents ID1 and ID4 of the transistors M1 and M4 respectively, of the MOS differential pairs will be derived.
Neglecting the body effect and the channel length modulation, and assuming that the relationship between a drain current and a gate-source voltage of a MOS transistor operating in saturation region follows the square-law, the drain current of a MOS transistor can be represented as follows:
ID=xcex2(VGSxe2x88x92VTH)2(VGSxe2x89xa7VTH)xe2x80x83xe2x80x83(9a) 
ID=0(VGSxe2x89xa6VTH)xe2x80x83xe2x80x83(9b) 
Here, xcex2=xcexc(COX/2)(W/L) is a transconductance parameter, xcexc is an effective mobility of carrier, COX is capacitance of a gate oxide film per unit area, W is a gate width, L is a gate length, and VTH is the threshold voltage of a MOS transistor.
Assuming that the MOS transistors are matched well, the drain currents of the transistors M1 and M4 become as follows:   {                                                        I              D1                        =                                          1                2                            ⁢                              {                                                      I                    SS                                    +                                      β                    ⁢                                                                  V                        i                                            2                                        ⁢                                                                                                                        2                            ⁢                                                          I                              SS                                                                                β                                                -                                                                              V                            i                            2                                                    4                                                                                                                    }                                                                          (                          |                              V                i                            |                              ≤                                  2                  ⁢                                                                                    I                        SS                                            β                                                                                            )                                                              xe2x80x83                        ⁢                          (10a)                                                                                      I              D1                        =                                          1                2                            ⁢                              I                                  S                  ⁢                                      xe2x80x83                                    ⁢                  S                                            ⁢                              xe2x80x83                            ⁢              s              ⁢                              xe2x80x83                            ⁢              g              ⁢                              xe2x80x83                            ⁢                              n                ⁡                                  (                                      V                    i                                    )                                                                                          (                          |                              V                i                            |                              ≥                                  2                  ⁢                                                                                    I                        SS                                            β                                                                                            )                                                              xe2x80x83                        ⁢                          (10b)                                            ⁢          
        ⁢          {                                                                  I                D4                            =                                                1                  2                                ⁢                                  {                                                            I                      SS                                        -                                          β                      ⁢                                                                        V                          i                                                2                                            ⁢                                                                                                                                  2                              ⁢                                                              I                                SS                                                                                      β                                                    -                                                                                    V                              i                              2                                                        4                                                                                                                                }                                                                                        (                              |                                  V                  i                                |                                  ≤                                      2                    ⁢                                                                                            I                          SS                                                β                                                                                                        )                                                                          xe2x80x83                            ⁢                              (11a)                                                                                                        I                D4                            =                                                1                  2                                ⁢                                  I                                      S                    ⁢                                          xe2x80x83                                        ⁢                    S                                                  ⁢                                  xe2x80x83                                ⁢                s                ⁢                                  xe2x80x83                                ⁢                g                ⁢                                  xe2x80x83                                ⁢                                  n                  ⁡                                      (                                          V                      i                                        )                                                                                                          (                              |                                  V                  i                                |                                  ≥                                      2                    ⁢                                                                                            I                          SS                                                β                                                                                                        )                                                                          xe2x80x83                            ⁢                              (11b)                                                        
where,
Vi=V1xe2x88x92V2xe2x80x83xe2x80x83(12) 
Therefore, the circuit shown in FIG. 17 also functions as a voltage subtractor circuit. That is, the circuit shown in FIG. 17 is a voltage subtractor/adder circuit.
An explanation will now be made on a MOS differential amplifier circuit which has linear transconductance. FIG. 18 shows a general structure of this type of MOS differential amplifier circuit which is disclosed in Japanese patent laid-open publication No. 7-127887. The circuit of FIG. 18 comprises a MOS differential pair having MOS transistors M1 and M2 which are driven by a tail current Iss (=I0+xcex2Vi2/2).
Assuming that the MOS transistors are matched well, a differential output current xcex94ID=ID1xe2x88x92ID2 of the MOS differential pair comprising the transistors M1 and M2 becomes as follows:   {                                                        Δ              ⁢                              xe2x80x83                            ⁢                              I                D                                      =                          β              ⁢                              xe2x80x83                            ⁢                              V                i                            ⁢                                                                                          2                      ⁢                                              I                        SS                                                              β                                    -                                      V                    i                    2                                                                                                            (                          |                              V                i                            |                              ≤                                                                            I                      SS                                        β                                                                        )                                                                    (13a)                                                                          Δ              ⁢                              xe2x80x83                            ⁢                              I                D                                      =                                          I                                  S                  ⁢                                      xe2x80x83                                    ⁢                  S                                            ⁢                              xe2x80x83                            ⁢              s              ⁢                              xe2x80x83                            ⁢              g              ⁢                              xe2x80x83                            ⁢                              n                ⁡                                  (                                      V                    i                                    )                                                                                          (                          |                              V                i                            |                              ≥                                                                            I                      SS                                        β                                                                        )                                                              xe2x80x83                        ⁢                                      (13b)                                            "AutoLeftMatch"  
Therefore, when the value within {square root over ( )} in the formula (13a) is a constant value, the differential output current xcex94ID of the MOS differential pair becomes linear. That is, the condition of the tail current in an adaptive-biasing differential pair becomes as follows:                               I                      S            ⁢                          xe2x80x83                        ⁢            S                          =                              I            0                    +                                    1              2                        ⁢            β            ⁢                          xe2x80x83                        ⁢                          V              i              2                                                          (        14        )            
Therefore, by driving a MOS differential pair by using a tail current which has a square-law characteristic of an input voltage, it is possible to completely compensate transconductance of the MOS differential pair. The method of driving a MOS differential pair by using a current which varies dynamically such that the transconductance becomes linear is called an adaptive-biasing method. Also, the differential pair which has a linear transconductance obtained in this way is called an adaptive-biasing differential pair.
FIG. 19 shows an example of a concrete circuit of an adaptive-biasing differential pair in which a tail current is supplied thereto by using quadri-tail cell as a squaring circuit.
An output current IL of an output of the quadri-tail cell shown in FIG. 19 can be obtained as follows:
IL=ID3+ID4xe2x80x83xe2x80x83(15) 
  {                                                        I              L                        =                                                            I                  0                                4                            -                                                β                  ⁢                                      xe2x80x83                                    ⁢                                      V                    i                    2                                                  4                                                                          (                          |                              V                i                            |                              ≤                                                                            2                      ⁢                                              I                        0                                                                                    3                      ⁢                      β                                                                                            )                                                              xe2x80x83                        ⁢                          (15a)                                                                                      I              L                        =                                          2                3                            -                                                I                  0                                ⁢                                                                                                    β                        ⁢                                                  xe2x80x83                                                ⁢                                                  V                          i                          2                                                                    +                                              2                        ⁢                        β                                                              |                                          V                      i                                        |                                                                  2                        ⁢                                                  (                                                                                                                    6                                ⁢                                                                  I                                  0                                                                                            β                                                        -                                                          V                              i                              2                                                                                )                                                                                                      18                                                                                          (                                                                                                      2                      ⁢                                              I                        0                                                                                    3                      ⁢                      β                                                                      ≤                            |                              V                i                            |                              ≤                                  2                  ⁢                                                                                    I                        0                                            β                                                                                            )                                                         (15b)                                                                          I              L                        =            0                                                (                          |                              V                i                            |                              ≥                                  2                  ⁢                                                                                                              I                          0                                                β                                            )                                                                                            )                                                              xe2x80x83                        ⁢                               (15c)                                            "AutoLeftMatch"  
Therefore, it is possible to obtain a square-law current.
In order to adaptively bias a MOS differential pair by driving the MOS differential pair by using the output current of the quadri-tail cell, it is possible to set the tail current as determined by the following formula:
Iss=2I0xe2x88x922ILxe2x80x83xe2x80x83(16) 
By setting the tail current in accordance with the above formula, transconductance becomes a constant value gm={square root over ( )}{(2I0)/xcex2}, in a range of an input voltage |Vi|xe2x89xa6{square root over ( )}{(2I0)/(3xcex2)}.
A differential output current xcex94I(=ID1xe2x88x92ID2) of an adaptive-biasing differential pair which uses the quadri-tail cell becomes as follows:   {                                                        Δ              ⁢                              xe2x80x83                            ⁢              I                        =                                                                                2                    ⁢                                          I                      0                                                        β                                            ⁢                              V                i                            ⁢                              xe2x80x83                            ⁢                              (                                  |                                      V                    i                                    |                                      ≤                                                                                            2                          ⁢                                                      I                            0                                                                                                    3                          ⁢                          β                                                                                                                    )                                                                                        xe2x80x83                        ⁢                          (                              17                ⁢                a                            )                                                                                                                                            Δ                    ⁢                                          xe2x80x83                                        ⁢                    I                                    =                                      xe2x80x83                                    ⁢                                                                                    β                        ⁢                                                  xe2x80x83                                                ⁢                                                  V                          i                                                                    3                                        ⁢                                                                                                                        12                            ⁢                                                                                          I                                0                                                            β                                                                                -                                                      7                            ⁢                                                          V                              i                              2                                                                                +                          4                                                |                                                  V                          i                                                |                                                                              2                            ⁢                                                          (                                                                                                                                    6                                    ⁢                                                                          I                                      0                                                                                                        β                                                                -                                                                  V                                  i                                  2                                                                                            )                                                                                                                                                                                                                                                                    xe2x80x83                                    ⁢                                      (                                                                                                                                                      2                              ⁢                                                              I                                0                                                                                                                    3                              ⁢                              β                                                                                                      ≦                                            |                                              V                        i                                            |                                              ≦                                                                                                            (                                                              1                                +                                                                  1                                                                      2                                                                                                                              )                                                        ⁢                                                                                          I                                0                                                            β                                                                                                                                            )                                                                                                                          xe2x80x83                        ⁢                          (                              17                ⁢                b                            )                                                                                                                                            Δ                    ⁢                                          xe2x80x83                                        ⁢                    I                                    =                                      xe2x80x83                                    ⁢                                                                                                              β                          ⁢                                                      xe2x80x83                                                    ⁢                                                      V                            i                            2                                                                          +                                                  6                          ⁢                                                      I                            0                                                                          +                                                  2                          ⁢                          β                                                                    |                                              V                        i                                            |                                                                        2                          ⁢                                                      (                                                                                                                            6                                  ⁢                                                                      I                                    0                                                                                                  β                                                            -                                                              V                                i                                2                                                                                      )                                                                                                                9                                                                                                                                            xe2x80x83                                    ⁢                                      (                                                                                                                                                      (                                                              1                                +                                                                  1                                                                      2                                                                                                                              )                                                        ⁢                                                                                          I                                0                                                            β                                                                                                      ≦                                            |                                              V                        i                                            |                                              ≦                                                  2                          ⁢                                                                                                                    I                                0                                                            β                                                                                                                                            )                                                                                                                          xe2x80x83                        ⁢                          (                              17                ⁢                c                            )                                                                                      Δ              ⁢                              xe2x80x83                            ⁢              I                        =                          2              ⁢                              I                0                            ⁢              s              ⁢                              xe2x80x83                            ⁢              g              ⁢                              xe2x80x83                            ⁢                              n                ⁡                                  (                                      V                    i                                    )                                            ⁢                              xe2x80x83                            ⁢                              (                                  |                                      V                    i                                    |                                      ≥                                                                                            I                          0                                                β                                                                                            )                                                                                        xe2x80x83                        ⁢                          (                              17                ⁢                d                            )                                            "AutoLeftMatch"  
Transconductance can be obtained by differentiating the formulas (17a) through (17d) by an input voltage Vi.   {                                                                        ⅆ                                  (                                      Δ                    ⁢                                          xe2x80x83                                        ⁢                    I                                    )                                                            ⅆ                                  V                  i                                                      =                                                            2                  ⁢                                      I                    0                                                  β                                                                          (                          |                              V                i                            |                              ≤                                                                            2                      ⁢                                              I                        0                                                                                    3                      ⁢                      β                                                                                            )                                                              xe2x80x83                        ⁢                          (18a)                                                                                                                                                                  ⅆ                                              (                                                  Δ                          ⁢                                                      xe2x80x83                                                    ⁢                          I                                                )                                                                                    ⅆ                                              V                        i                                                                              =                                      xe2x80x83                                    ⁢                                                                                    β                        3                                            ⁢                                                                                                                                  12                              ⁢                                                                                                I                                  0                                                                β                                                                                      -                                                          7                              ⁢                                                              V                                i                                2                                                                                      +                            4                                                    |                                                      V                            i                                                    |                                                                                    2                              ⁢                                                              (                                                                                                                                            6                                      ⁢                                                                              I                                        0                                                                                                              β                                                                    -                                                                      V                                    i                                    2                                                                                                  )                                                                                                                                                                          +                                                                                                                                            xe2x80x83                                    ⁢                                                            β                      3                                        ⁢                                          V                      i                                        ⁢                                          {                                                                                                    -                            7                                                    ⁢                                                      V                            i                                                                          +                                                  2                          ⁢                                                      sgn                            ⁡                                                          (                                                              V                                i                                                            )                                                                                ⁢                                                                                    2                              ⁢                                                              (                                                                                                                                            6                                      ⁢                                                                              I                                        0                                                                                                              β                                                                    -                                                                      V                                    i                                    2                                                                                                  )                                                                                                                                    -                                                                                                                                                                                      xe2x80x83                                    ⁢                                                                                    4                        ⁢                        β                                            |                                              V                        i                                            |                                              V                        i                                                                                                            2                        ⁢                                                  (                                                                                                                    6                                ⁢                                                                  I                                  0                                                                                            β                                                        -                                                          V                              i                              2                                                                                )                                                                                                      }                                                                                          xe2x80x83                                                xe2x80x83                                                            1                                                                                                                                                        12                          ⁢                                                                                    I                              0                                                        β                                                                          -                                                  7                          ⁢                                                      V                            i                            2                                                                          +                        4                                            |                                              V                        i                                            |                                                                        2                          ⁢                                                      (                                                                                                                            6                                  ⁢                                                                      I                                    0                                                                                                  β                                                            -                                                              V                                i                                2                                                                                      )                                                                                                                                                                                                                (                                                                                                                                                      2                              ⁢                                                              I                                0                                                                                                                    3                              ⁢                              β                                                                                                      ≤                                            |                                              V                        i                                            |                                              ≤                                                                                                            (                                                              1                                +                                                                  1                                                                      2                                                                                                                              )                                                        ⁢                                                                                          I                                0                                                            β                                                                                                                                            )                                                                                                            xe2x80x83                                                              xe2x80x83                        ⁢                          (18b)                                                                                                      ⅆ                                  (                                      Δ                    ⁢                                          xe2x80x83                                        ⁢                    I                                    )                                                            ⅆ                                  V                  i                                                      =                                                            2                  ⁢                  β                                9                            ⁢                              {                                                      V                    i                                    +                                                            sgn                      ⁡                                              (                                                  V                          i                                                )                                                              ⁢                                                                  2                        ⁢                                                  (                                                                                                                    6                                ⁢                                                                  I                                  0                                                                                            β                                                        -                                                          V                              i                              2                                                                                )                                                                                                      -                                                                                    4                        ⁢                        β                                            |                                              V                        i                                            |                                              V                        i                                                                                                            2                        ⁢                                                  (                                                                                                                    6                                ⁢                                                                  I                                  0                                                                                            β                                                        -                                                          V                              i                              2                                                                                )                                                                                                                    }                                                                          xe2x80x83                                                xe2x80x83                                                            (                                                                                                      (                                              1                        +                                                  1                                                      2                                                                                              )                                        ⁢                                                                  I                        0                                            β                                                                      ≤                            |                              V                i                            |                              ≤                                                                            I                      0                                        β                                                                        )                                                xe2x80x83                                                              xe2x80x83                        ⁢                          (18c)                                                                                                      ⅆ                                  (                                      Δ                    ⁢                                          xe2x80x83                                        ⁢                    I                                    )                                                            ⅆ                                  V                  i                                                      =            0                                                (                          |                              V                i                            |                              ≥                                  2                  ⁢                                                                                    I                        0                                            β                                                                                            )                                                              xe2x80x83                        ⁢                          (18d)                                            "AutoLeftMatch"  
As can be seen from the above formulas, the transconductance of an adaptive-biasing differential pair becomes a constant value gm={square root over ( )}{(2I0)/xcex2}, that is, the transconductance of an adaptive-biasing differential pair shows a flat characteristic, in a range of an input voltage |Vi|xe2x89xa6{square root over ( )}{(2I0)/(3xcex2)}.
Although the above-mentioned voltage adder circuit has both the subtraction function and addition function, the subtraction function is inferior in linearity to the addition function.
Also, in a linear transconductance amplifier for realizing both the subtraction function and addition function, an input voltage range in which the linear transconductance amplifier operates linearly depends on an input voltage range within which the squaring circuit for supplying the tail current has a square-law characteristic. However, it is difficult to realize a squaring circuit which has an input voltage range within which the squaring circuit shows a square-law characteristic throughout the whole operating input voltage range of the MOS differential pair. Therefore, conventionally, it was impossible to realize a linear transconductance amplifier having a wide linear input voltage range.
In the field of analog signal processing, a circuit for performing subtraction and/or addition is an essential function block. Especially, the requirement for realizing a MOS differential amplifier circuit having linear subtraction and addition function has become stronger.
Also, such MOS differential amplifier circuit having linear subtraction and addition function can be realized by using a differential amplifier circuit having linear transconductance. Therefore, such differential amplifier circuit having linear transconductance is also an essential function block in the field of analog signal processing. Especially, the requirement for realizing a MOS differential amplifier circuit having linear transconductance has become stronger.
Therefore, it is an object of the present invention to provide a MOS differential amplifier circuit which has linear subtraction and addition function over a wide input voltage range.
It is another object of the present invention to provide a MOS differential amplifier circuit which has linear subtraction and addition function and which is easily implemented in an LSI device.
It is still another object of the present invention to provide a MOS differential amplifier circuit which has subtraction and addition function and which has simple circuit structure.
It is still another object of the present invention to provide a MOS differential amplifier circuit which has linear transconductance over a wide input voltage range.
It is still another object of the present invention to provide a MOS differential amplifier circuit which has linear transconductance and which is easily implemented in an LSI device.
It is still another object of the present invention to obviate the disadvantages of the conventional MOS differential amplifier circuits.
According to an aspect of the present invention, there is provided a voltage subtractor/adder circuit comprising: a differential pair having first and second MOS transistors, gate electrodes of said first and second MOS transistors forming input terminals for receiving an input differential voltage, drain electrodes of said first and second MOS transistors forming output terminals for outputting a subtraction output signal, and source electrodes of said first and second MOS transistors being commonly coupled to form an output terminal for addition output voltage; and wherein the sum of currents flowing through said first and second MOS transistors increases in proportion to the square of said input differential voltage.
In this case, it is preferable that the voltage subtractor/adder circuit further comprises a level shifter for level-shifting the addition output voltage from the source electrodes which are commonly coupled.
According to another aspect of the present invention, there is provided a voltage subtractor/adder circuit comprising: a differential pair having first and second MOS transistors, gate electrodes of the first and second MOS transistors forming input terminals for receiving an input differential voltage, drain electrodes of the first and second MOS transistors forming output terminals for outputting a subtraction output signal, and source electrodes of the first and second MOS transistors being commonly coupled to form an output terminal for addition output voltage; and a constant current source which drives the differential pair.
In this case, it is preferable that the voltage subtractor/adder circuit further comprises a level shifter for level-shifting the addition output voltage from the source electrodes which are commonly coupled.
According to still another aspect of the present invention, there is provided a MOS differential amplifier circuit comprising: a MOS differential pair having first and second MOS transistors and receiving an input differential voltage, source electrodes of the first and second MOS transistors being commonly coupled and being driven by a current source; and wherein current value of the current source being controlled such that a difference voltage between a common mode voltage and a common source voltage of the first and second MOS transistors becomes a constant value.
In this case, it is also preferable that the MOS differential amplifier circuit further comprises a level shifter for level-shifting the common source voltage of the first and second MOS transistors.
According to still another aspect of the present invention, there is provided a MOS differential amplifier circuit comprising: a MOS differential pair having first and second MOS transistors and receiving an input differential voltage, source electrodes of the first and second MOS transistors being commonly coupled and being driven by a constant current source; and wherein a current is injected into the constant current source such that a difference voltage between a common mode voltage and a common source voltage of the first and second MOS transistors becomes a constant voltage.
According to still another aspect of the present invention, there is provided a MOS differential amplifier circuit comprising: a MOS differential pair having first and second MOS transistors and receiving an input differential voltage, source electrodes of the first and second MOS transistors being commonly coupled and being driven by a constant current source; and third and fourth MOS transistors which are load transistors of the first and second MOS transistors, respectively, and whose gates receive the sum of a predetermined constant voltage and a voltage obtained by subtracting a common source voltage of the first and second MOS transistors from a common mode voltage.
According to still another aspect of the present invention, there is provided a complementary MOS differential amplifier circuit comprising: a MOS differential pair having first and second MOS transistors and receiving an input differential voltage, source electrodes of the first and second MOS transistors being commonly coupled and being driven by a first constant current source; a MOS quadri-tail cell having third, fourth, fifth and sixth MOS transistors which have different conductivity type from that of the first and second MOS transistors, source electrodes of the third, fourth, fifth and sixth MOS transistors being commonly coupled and being driven by a second constant current source; wherein gate electrodes of the fifth and sixth MOS transistors being coupled to a common source electrode of the first and second MOS transistors, drain electrodes of the fifth and third MOS transistors being commonly coupled and forming one output terminal, drain electrodes of the sixth and fourth MOS transistors being commonly coupled and forming the other output terminal, and gate electrodes of the first and second MOS transistors and gate electrodes of the third and fourth MOS transistors receiving input voltages.
In this case, it is preferable that the complementary MOS differential amplifier circuit further comprises level shifters for level-shifting the input voltages before being applied to the gate electrodes of the first and second MOS transistors and the gate electrodes of the third and fourth MOS transistors.
It is also preferable that the ratio of the current value of the first constant current source and transconductance parameter of the first and second MOS transistors is approximately half of the ratio of the current value of the second constant current source and transconductance parameter of the third, fourth, fifth and sixth MOS transistors.
It is further preferable that the complementary MOS differential amplifier circuit comprises first and second MOS differential amplifier circuits each of which is the complementary MOS differential amplifier circuit as set forth above, wherein corresponding MOS transistors of the first and second MOS differential amplifier circuits have mutually different conductivity types and wherein the first and second MOS differential amplifier circuits are coupled parallel to form a differential input pair.
It is also advantageous that transconductance of the MOS differential amplifier circuit is adjustable by controlling current values of at least one of the first and second constant current sources.
Constitution of the present invention is again described briefly in other words. The linear voltage subtractor/adder circuit according to the present invention has a structure in which gate electrodes of first and second transistors constitute a pair of input terminals or an input terminal pair, and drains of the first and second transistors constitute a pair of subtraction output terminals or a subtraction output terminal pair. Source electrodes of the first and second transistors are commonly coupled and constitute an addition output terminal. The sum of currents flowing through the first and second transistors increases in proportion to a differential input voltage.
Also, a simplified voltage subtractor/adder circuit according to the present invention has a structure in which gate electrodes of first and second transistors constitute a pair of input terminals or an input terminal pair, and drains of the first and second transistors constitute a pair of subtraction output terminals or a subtraction output terminal pair. Source electrodes of the first and second transistors are commonly coupled to constitute an addition output terminal and are driven by a constant current source.
In a CMOS differential amplifier circuit having linear transconductance according to the present invention, an input pair is composed of a MOS differential pair in which source electrodes of first and second transistors are commonly coupled and are driven by a current source. The current value of the current source is controlled such that a difference voltage between the common mode voltage and the common source voltage of the first and second transistors becomes a constant voltage.
In other constitution, an input pair is composed of a MOS differential pair in which source electrodes of first and second transistors are commonly coupled and are driven by a constant current source, and a current is sourced into the constant current source such that a difference voltage between the common mode voltage and the common source voltage of the first and second transistors becomes a constant voltage.
Further, a MOS differential amplifier circuit having linear transconductance according to the present invention comprises a MOS differential pair and a MOS quadri-tail cell coupled parallel with the MOS differential pair. Transistors constituting the MOS differential pair have different conductivity type from that of transistors constituting the MOS quadri-tail cell.
Operation of the present invention will now be described. Non-linearity of a MOS differential pair is caused by an increase in the common source voltage according to an increase in an input voltage. Therefore, in the MOS differential pair, it is possible to obtain a drive current which is proportional to the square of an input voltage, by controlling a tail current such that the difference between the common source voltage and the input common mode voltage becomes constant. Thereby, the tail current driving the MOS differential pair becomes a current which is proportional to the square of an input voltage. Thus, it is possible to equivalently obtain an adaptive-biasing differential pair and to realize a CMOS differential amplifier circuit having linear transconductance. By such structure of the present invention, the difference between the common source voltage and the input common mode voltage becomes constant, so that a voltage addition function can be obtained. Also, the differential output current is proportional to the differential input voltage, so that a voltage subtraction function can be obtained. As a result thereof, it is possible to realize a linear voltage subtractor/adder circuit.